We are seeking a strong and versatile Senior Signal Integrity Engineer who has excellent experience with board level simulation. He/She will be involved with the board design and development effort through all phases including analysis, design, layout, simulation, prototype bring-up, test, complete design documentation, and release to manufacturing. He/ She is expected to understand signal integrity issues, board layout design rules and system-level software fundamentals Candidate should be a self-starter who thrives in fast-paced environments and employs creative problem solving to overcome engineering challenges.
BSEE or equivalent required. (MSEE preferred) · 10+ years¨ of industry experience with Board Post Simulation Level and high-speed circuit design, test, and integration, including Expertise in Cadence Spectra-Quest and Mentor Graphic Hyperlynx or XTK.
Expert in IBIS Modeling.
Expert in HSPICE Model Extraction.
Familiar with DDR/QDR interfaces (chip-to-chip, SDRAM (DDR), SRAM (QDR).
Simultaneous switching output analysis.
Simulations of device I/O to reduce overshoot and undershoot (which can cause increased noise on power planes due to return currents).
Crosstalk analysis of signals to reduce noise.
Return current analysis for noise reduction.
Proper transmission line impedance control.
Lab measurements using oscilloscopes, spectrum analyzers, etc. for verification.